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4E001

Computers

Category 4Group EWassenaar Arrangement1 thresholds

Description

"Technology" as follows:

Control Thresholds

Reference	Parameter	Threshold
4E001.b	s follows: 1. "Digital computers" having an 'Adjusted Peak Performance' ('APP')	> 24 Weighted

Sub-entries (3)

4E001.a

"Technology" according to the General Technology Note, for the "development", "production" or "use" of equipment or "software" specified in 4.A. or 4.D.;

4E001.b

"Technology" according to the General Technology Note, other than that specified in 4.E.1.a., for the "development" or "production" of equipment as follows: 1. "Digital computers" having an 'Adjusted Peak Performance' ('APP') exceeding 24 Weighted TeraFLOPS (WT); 2. "Electronic assemblies" specially designed or modified for enhancing performance by aggregation of processors so that the 'APP' of the aggregation exceeds the limit in 4.E.1.b.1.;

s follows: 1. "Digital computers" having an 'Adjusted Peak Performance' ('APP'): > 24 Weighted

4E001.c

"Technology" for the "development" of "intrusion software". 1. Aggregate all processors and accelerators operating simultaneously and located on the same die. 2. Processor combinations share memory when any processor is capable of accessing any memory location in the system through the hardware transmission of cache lines or memory words, without the involvement of any software mechanism, which may be achieved using "electronic assemblies" specified in 4.A.3.c.

Product Examples

Intel technical documentation for Xeon Scalable server design
NVIDIA DGX cluster design schematics
Manufacturing procedures for HPE Cray EX supercomputers
Intrusion software development manuals for Red Team
Technical training on AMD EPYC processor aggregation optimization

Decontrol note

Les informations déjà publiées, disponibles dans le commerce ou nécessaires à l’installation, à l’entretien ou à la réparation d’équipements non contrôlés sont généralement exemptées (voir Note générale sur la technologie).

Related CN customs codes (indicative)

49019900 85234945 85234920

Notes

-Note 1 4.E.1.a. and 4.E.1.c. do not apply to "vulnerability disclosure" or "cyber incident response".
-Note 2 Note 1 does not diminish national authorities' rights to ascertain compliance with 4.E.1.a. and 4.E.1.c.
-TECHNICAL NOTE ON 'ADJUSTED PEAK PERFORMANCE' ('APP')
-Note In determining FPO, include only 64-bit or larger floating point additions or multiplications. All floating point operations must be expressed in operations per processor cycle; operations requiring multiple cycles may be expressed in fractional results per cycle. For processors not capable of performing calculations on floating point operands of 64-bit or more, the effective calculating rate R is zero.
-Note 1 For processors that perform compound operations in a cycle, such as addition and multiplication, each operation is counted.
-Note 2 For a pipelined processor the effective calculating rate R is the faster of the pipelined rate, once the pipeline is full, or the non-pipelined rate.
-Note 3 The calculating rate R of each contributing processor is to be calculated at its maximum value theoretically possible before the 'APP' of the combination is derived. Simultaneous operations are assumed to exist when the computer manufacturer claims concurrent, parallel, or simultaneous operation or execution in a manual or brochure for the computer.
-TECHNICAL NOTE ON 'ADJUSTED PEAK PERFORMANCE' ('APP')
-Note 4 Do not include processors that are limited to input/output and peripheral functions (e.g., disk drive, communication and video display) when calculating 'APP'.
-Note 5 'APP' values are not to be calculated for processor combinations (inter)connected by "Local Area Networks", Wide Area Networks, I/O shared connections/devices, I/O controllers and any communication interconnection implemented by "software".
-Note 6 'APP' values must be calculated for processor combinations containing processors specially designed to enhance performance by aggregation, operating simultaneously and sharing memory.
-Technical Notes
-Note 7 A 'vector processor' is defined as a processor with built-in instructions that perform multiple calculations on floating-point vectors (one-dimensional arrays of 64-bit or larger numbers) simultaneously, having at least 2 vector functional units and at least 8 vector registers of at least 64 elements each.

Applicable Notes

General Technology Note (GTN)

The export of 'technology' which is 'required' for the 'development', 'production' or 'use' of items controlled in Categories 0 to 9 is controlled according to the provisions in each Category. 'Techno...

General Software Note (GSN)

The Lists do not control 'software' which is either: 1. Generally available to the public by being: a. Sold from stock at retail selling points, without restriction, by means of: (1) Over-the-counter ...

Category 4 - Computers

This category covers digital computers, assemblies and related equipment. The primary control threshold is the Adjusted Peak Performance (APP), measured in Weighted TeraFLOPS (WT). APP is an adjusted ...

Catch-All Clause - Article 4 of Regulation (EU) 2021/821

Article 4(1): An authorisation shall be required for the export of dual-use items not listed in Annex I if the exporter has been informed by the competent authority that the items in question are or m...

Cyber-Surveillance Catch-All - Article 5 of Regulation (EU) 2021/821

Article 5(1): An authorisation shall be required for the export of cyber-surveillance items not listed in Annex I if the exporter has been informed by the competent authority that the items in questio...

View official text on EUR-Lex

-Note 1 4.E.1.a. and 4.E.1.c. do not apply to "vulnerability disclosure" or "cyber incident response".
-Note 2 Note 1 does not diminish national authorities' rights to ascertain compliance with 4.E.1.a. and 4.E.1.c.
-TECHNICAL NOTE ON 'ADJUSTED PEAK PERFORMANCE' ('APP')
-Note In determining FPO, include only 64-bit or larger floating point additions or multiplications. All floating point operations must be expressed in operations per processor cycle; operations requiring multiple cycles may be expressed in fractional results per cycle. For processors not capable of performing calculations on floating point operands of 64-bit or more, the effective calculating rate R is zero.
-Note 1 For processors that perform compound operations in a cycle, such as addition and multiplication, each operation is counted.
-Note 2 For a pipelined processor the effective calculating rate R is the faster of the pipelined rate, once the pipeline is full, or the non-pipelined rate.
-Note 3 The calculating rate R of each contributing processor is to be calculated at its maximum value theoretically possible before the 'APP' of the combination is derived. Simultaneous operations are assumed to exist when the computer manufacturer claims concurrent, parallel, or simultaneous operation or execution in a manual or brochure for the computer.
-TECHNICAL NOTE ON 'ADJUSTED PEAK PERFORMANCE' ('APP')
-Note 4 Do not include processors that are limited to input/output and peripheral functions (e.g., disk drive, communication and video display) when calculating 'APP'.
-Note 5 'APP' values are not to be calculated for processor combinations (inter)connected by "Local Area Networks", Wide Area Networks, I/O shared connections/devices, I/O controllers and any communication interconnection implemented by "software".
-Note 6 'APP' values must be calculated for processor combinations containing processors specially designed to enhance performance by aggregation, operating simultaneously and sharing memory.
-Technical Notes
-Note 7 A 'vector processor' is defined as a processor with built-in instructions that perform multiple calculations on floating-point vectors (one-dimensional arrays of 64-bit or larger numbers) simultaneously, having at least 2 vector functional units and at least 8 vector registers of at least 64 elements each.